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IDT74FCT2652AT/CT FAST CMOS OCTAL TRANSCEIVER/REGISTER (3-STATE)
INDUSTRIAL TEMPERATURE RANGE
FAST CMOS OCTAL TRANSCEIVER/ REGISTERS (3-STATE)
FEATURES:
* * * * * * * * *
IDT74FCT2652AT/CT
A and C grades Low input and output leakage 1A (max.) CMOS power levels True TTL input and output compatibility: - VOH = 3.3V (typ.) - VOL = 0.3V (typ.) Resistor outputs (-15mA IOH, 12mA IOL) Meets or exceeds JEDEC standard 18 specifications Reduced system switching noise Power off disable outputs permit "live insertion" Available in SOIC and QSOP packages
DESCRIPTION:
The FCT2652T consists of a bus transceiver with 3-state D-type flip-flops and control circuitry arranged for multiplexed transmission of data directly from the data bus or from the internal storage registers. The FCT2652T utilizes GAB and GBA signals to control the transceiver functions. SAB and SBA control pins are provided to select either real- time or stored data transfer. The circuitry used for select control will eliminate the typical decoding glitch that occurs in a multiplexer during the transition between stored and real-time data. A low input level selects real-time data and a high selects stored data. Data on the A or B data bus, or both, can be stored in the internal D flipflops by low-to-high transitions at the appropriate clock pins (CPAB or CPBA), regardless of the select or enable control pins. The FCT2652T have balanced drive outputs with current limiting resistors. This offers low ground bounce, minimal undershoot and controlled output fall times-reducing the need for external series terminating resistors. FCT2652T parts are plug-in replacements for FCT652T parts.
FUNCTIONAL BLOCK DIAGRAM
GBA GAB
CPBA SBA CPAB SAB B REG ONE OF EIGHT CHANNELS 1D C1
A1
A REG 1D C1
B1
TO SEVEN OTHER CHANNELS
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
INDUSTRIAL TEMPERATURE RANGE
1
AUGUST 2000
DSC-5509/1
(c) 2000 Integrated Device Technology, Inc.
IDT74FCT2652AT/CT FAST CMOS OCTAL TRANSCEIVER/REGISTER (3-STATE)
INDUSTRIAL TEMPERATURE RANGE
PIN CONFIGURATION
24 23 22 21 20 19 18 17 16 15 14 13
ABSOLUTE MAXIMUM RATINGS(1)
Symbol VTERM(2) Description Terminal Voltage with Respect to GND Terminal Voltage with Respect to GND Storage Temperature DC Output Current Max -0.5 to +7 -0.5 to VCC+0.5 -65 to +150 -60 to +120 Unit V V C mA VTERM(3) TSTG IOUT
CPAB SAB GAB A1 A2 A3 A4 A5 A6 A7 A8 GND
1 2 3 4 5 6 7 8 9 10 11 12
VCC CPBA SBA GBA B1 B2 B3 B4 B5 B6 B7 B8
NOTES: 1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. No terminal voltage may exceed Vcc by +0.5V unless otherwise noted. 2. Inputs and Vcc terminals only. 3. Output and I/O terminals only.
CAPACITANCE (TA = +25C, F = 1.0MHz)
Symbol CIN COUT Parameter(1) Input Capacitance Output Capacitance Conditions VIN = 0V VOUT = 0V Typ. 6 8 Max. 10 12 Unit pF pF
NOTE: 1. This parameter is measured at characterization but not tested.
SOIC/ QSOP TOP VIEW
PIN DESCRIPTION
Pin Names A1 - A8 B1 - B8 CPAB, CPBA SAB, SBA GAB, GBA Description Data Register A Inputs Data Register B Output Data Register B Inputs Data Register A Output Clock Pulse Inputs Output Data Source Select Inputs Output Enable Inputs
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IDT74FCT2652AT/CT FAST CMOS OCTAL TRANSCEIVER/REGISTER (3-STATE)
INDUSTRIAL TEMPERATURE RANGE
FUNCTION TABLE (1)
Inputs GAB H H X H L L L L L L H GBA X X H H X L L L H H L CPAB H or L H or L X X X H or L H or L CPBA H or L H or L X H or L X X H or L SAB X X X X X X X X L H H SBA X X X X X X L H X X H Output Output Input Output Input Input Unspecified Output Output
(2)
Data I/O A1 - A8 Input B1 - B8 Input Unspecified Output Input Input Input
(2)
Operation Isolation Store A and B Data Store A, Hold B Store A in Both Registers Hold A, Store B Store B in Both Registers Real-Time B Data to A Bus Stored B Data to A Bus Real-Time A Data to B Bus Stored A Data to B Bus Stored A Data to B Bus Stored B Data to A Bus
NOTES: 1. H = HIGH L = LOW X = Don't Care = LOW-to-HIGH transition. Select control = L: clocks can occur simultaneously. Select control = H: clocks must be staggered in order to load both registers. 2. The data output functions may be enabled or disabled by various signals at the GAB or GBA inputs. Data input functions are always enabled, i.e. data at the bus pins will be stored on every LOW-to-HIGH transition on the clock inputs.
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IDT74FCT2652AT/CT FAST CMOS OCTAL TRANSCEIVER/REGISTER (3-STATE)
INDUSTRIAL TEMPERATURE RANGE
BU S A
BUS B
BUS A
BU S B
GAB L
GBA L
CPAB X
CPBA X
SAB X
SBA L
GAB H
GBA H
C PAB X
CPBA X
SAB L
SBA X
Real-Time Transfer Bus B to A
Real-Time Transfer Bus A to B
BUS A
BUS B
BUS A
BUS B
GAB X L L
GBA H X H
CPAB
CPBA X

SAB X X X
SBA X X X
GAB H
GBA L
CPAB H or
CPBA H or
SAB H
SBA H
X
Storage From A and/or B
Transfer Stored Data to A and/or B
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IDT74FCT2652AT/CT FAST CMOS OCTAL TRANSCEIVER/REGISTER (3-STATE)
INDUSTRIAL TEMPERATURE RANGE
DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE
Following Conditions Apply Unless Otherwise Specified: Industrial: TA = -40C to +85C, VCC = 5.0V 5%
Symbol VIH VIL IIH IIL IOZH IOZL II VIK VH ICC Parameter Input HIGH Level Input LOW Level Input HIGH Current(4) Input LOW Current(4) High Impedance Output Current (3-State output pins)(4) Input HIGH Current(4) Clamp Diode Voltage Input Hysteresis Quiescent Power Supply Current VCC = Max., VI = VCC (Max.) VCC = Min, IIN = -18mA -- VCC = Max., VIN = GND or VCC Test Conditions(1) Guaranteed Logic HIGH Level Guaranteed Logic LOW Level VCC = Max. VCC = Max. VCC = Max VI = 2.7V VI = 0.5V VO = 2.7V VO = 0.5V Min. 2 -- -- -- -- -- -- -- -- -- Typ.(2) -- -- -- -- -- -- -- -0.7 200 0.01 Max. -- 0.8 1 1 1 1 1 -1.2 -- 1 A V mV A Unit V V A A A
OUTPUT DRIVE CHARACTERISTICS
Symbol IODL IODH VOH VOL Parameter Output LOW Current Output HIGH Current Output HIGH Voltage Output LOW Voltage Test Conditions(1) VCC = 5V, VIN = VIH or VIL, VOUT = 1.5V(3) VCC = 5V, VIN = VIH or VIL, VOUT = 1.5V(3) VCC = Min IOH = -15mA VIN = VIH or VIL VCC = Min IOL = 12mA VIN = VIH or VIL Min. 16 -16 2.4 -- Typ.(2) 48 -48 3.3 0.3 Max. -- -- -- 0.5 Unit mA mA V V
NOTES: 1. For conditions shown as Min. or Max., use appropriate value specified under Electrical Characteristics for the applicable device type. 2. Typical values are at VCC = 5.0V, +25C ambient. 3. Not more than one output should be tested at one time. Duration of the test should not exceed one second. 4. The test limit for this parameter is 5A at TA = -55C.
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IDT74FCT2652AT/CT FAST CMOS OCTAL TRANSCEIVER/REGISTER (3-STATE)
INDUSTRIAL TEMPERATURE RANGE
POWER SUPPLY CHARACTERISTICS
Symbol ICC ICCD Parameter Quiescent Power Supply Current TTL Inputs HIGH Dynamic Power Supply Current(4) VCC = Max. VIN = 3.4V(3) VCC = Max. Outputs Open GAB = GBA = GND One Input Toggling 50% Duty Cycle VCC = Max. Outputs Open fCP = 10MHz 50% Duty Cycle GAB = GBA = GND One Bit Toggling at fi = 5MHz 50% Duty Cycle VCC = Max. Outputs Open fCP = 10MHz 50% Duty Cycle GAB = GBA = GND Eight Bits Toggling at fi = 2.5MHz 50% Duty Cycle VIN = VCC VIN = GND Test Conditions(1) Min. -- -- Typ.(2) 0.5 0.06 Max. 2 0.12 Unit mA mA/ MHz
IC
Total Power Supply Current(6)
VIN = VCC VIN = GND
--
0.6
2.2
mA
VIN = 3.4V VIN = GND
--
1.1
4.2
VIN = VCC VIN = GND
--
1.5
4(5)
VIN = 3.4V VIN = GND
--
3.8
13(5)
NOTES: 1. For conditions shown as Min. or Max., use appropriate value specified under Electrical Characteristics for the applicable device type. 2. Typical values are at VCC = 5.0V, +25C ambient. 3. Per TTL driven input; (VIN = 3.4V). All other inputs at VCC or GND. 4. This parameter is not directly testable, but is derived for use in Total Power Supply Calculations. 5. Values for these conditions are examples of ICC formula. These limits are guaranteed but not tested. 6. IC = IQUIESCENT + IINPUTS + IDYNAMIC IC = ICC + ICC DHNT + ICCD (fCP/2+ fiNi) ICC = Quiescent Current ICC = Power Supply Current for a TTL High Input (VIN = 3.4V) DH = Duty Cycle for TTL Inputs High NT = Number of TTL Inputs at DH ICCD = Dynamic Current caused by an Input Transition Pair (HLH or LHL) fCP = Clock Frequency for Register Devices (Zero for Non-Register Devices) fi = Output Frequency Ni = Number of Outputs at fi All currents are in milliamps and all frequencies are in megahertz.
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IDT74FCT2652AT/CT FAST CMOS OCTAL TRANSCEIVER/REGISTER (3-STATE)
INDUSTRIAL TEMPERATURE RANGE
SWITCHING CHARACTERISTICS OVER OPERATING RANGE
Symbol tPLH tPHL tPZH tPZL tPHZ tPLZ tPLH tPHL tPLH tPHL tSU tH tW Parameter Propagation Delay Bus to Bus Output Enable Time GAB, GBA to Bus Output Disable Time GAB, GBA to Bus Propagation Delay Clock to Bus Propagation Delay SBA or SAB to Bus Set-up Time, HIGH or LOW Bus to Clock Hold Time, HIGH or LOW Bus to Clock Clock Pulse Width HIGH or LOW(3) Condition(1) CL = 50pF RL = 500 FCT2652AT Min.(2) Max. 2 6.3 2 2 2 2 2 1.5 5 9.8 6.3 6.3 7.7 -- -- -- FCT2652CT Min.(2) Max. 1.5 5.4 1.5 1.5 1.5 1.5 2 1.5 5 7.8 6.3 5.7 6.2 -- -- -- Unit ns ns ns ns ns ns ns ns
NOTES: 1. See test circuit and waveforms. 2. Minimum limits are guaranteed but not tested on Propagation Delays. 3. This parameter is guaranteed but not tested.
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IDT74FCT2652AT/CT FAST CMOS OCTAL TRANSCEIVER/REGISTER (3-STATE)
INDUSTRIAL TEMPERATURE RANGE
TEST CIRCUITS AND WAVEFORMS
V CC 7.0V 500 VIN Pulse G enerator D.U.T. 50pF R
T
SWITCH POSITION
Test Switch Closed Open Open Drain Disable Low Enable Low All Other Tests
V OU T
500 C
L
DEFINITIONS: CL = Load capacitance: includes jig and probe capacitance. RT = Termination resistance: should be equal to ZOUT of the Pulse Generator.
Octal link
Test Circuits for All Outputs
DATA INPUT tSU TIMING INPUT ASYNCHRO NOUS CONTROL PRESET CLEAR ETC. SYNCHRON OUS CONTROL PRESET CLEAR CLOCK ENABLE ETC. tREM tH
3V 1.5V 0V 3V 1.5V 0V 3V 1.5V 0V 3V 1.5V 0V
Octal link
LOW -HIGH-LOW PULSE tW HIGH-LOW -HIG H PULSE
Octal link
1.5V
1.5V
tSU
tH
Pulse Width
Set-Up, Hold, and Release Times
ENABLE SAM E PHASE INPUT TRANSITION tPLH O UTPUT tPLH OPPOSITE PHASE INPUT TRANSITION tPHL tPHL 3V 1.5V 0V VOH 1.5V VOL 3V 1.5V 0V
Octal link
DISABLE 3V
CONTROL INPUT tPZL OUTPUT NORMALLY LOW SW ITCH CLO SED tPZH OUTPUT NORMALLY HIGH SW ITCH OPEN 3.5V 1.5V 0.3V tPHZ 0.3V 1.5V 0V tPLZ
1.5V 0V 3.5V VOL VOH
0V
Octal link
Propagation Delay
Enable and Disable Times
NOTES: 1. Diagram shown for input Control Enable-LOW and input Control Disable-HIGH. 2. Pulse Generator for All Pulses: Rate 1.0MHz; tF 2.5ns; tR 2.5ns.
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IDT74FCT2652AT/CT FAST CMOS OCTAL TRANSCEIVER/REGISTER (3-STATE)
INDUSTRIAL TEMPERATURE RANGE
ORDERING INFORMATION
IDT XXXX XX FCT Device Type Temperature Range X Package
SO Q
Small Outline IC Quarter-size Small Outline Package
2652AT 2652CT
Octal Transceiver/Register (3-State)
74
- 40C to +85C
CORPORATE HEADQUARTERS 2975 Stender Way Santa Clara, CA 95054
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for Tech Support: logichelp@idt.com (408) 654-6459
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